Past Technical Publications, Presentations and University Talks

As a curious engineer with an inclination to connect I present at technical forums large and small to exchange ideas with others.

• June 2020- IEEE International Conference on Design and Test of Integrated Micro and Nano-Systems; Why Defect Based Testing Works for High-Speed I/O Interfaces
• Jan 2020- Oregon State University, Electrical Engineering and Computer Science Colloquia: Breaking Data Silos- IC Design, Manufacturing Test, System Quality and Reliability
• Nov 2018- International Test conference: What’s up with Analog Test Coverage: IEEE P2427 IEEE Working Group Progress (poster)
• June 2018- Forum for Engineering and Philosophy 2018: A Thousand and One Engineering Stories
• Oct 2017- International Test Conference: An Immodest Proposal to Bridge Test and Design Data for SoC and IP Yield (poster)
• May 2017- ASMC: Enhancing Yield Learning on SoC designs by Tracking IP Manufacturability
• Dec 2016- SoC Design and Reuse Conference: A Knowledge Sharing Framework for Fabs, SoC Design Houses and IP Vendors
• Dec 2016- TIMA Grenoble France Lab: Tales from a Traveler of Intel’s IO Test Methodology Roadmap
• Nov 2016- Portland State University, Engineering Technology and Management Graduate Seminar Series- Tales from a Traveler of Intel’s IO Test Methodology Roadmap
• Oct 2016- DATA workshop- Improved Understanding of IP Manufacturability—A Proposal to Share Data between Fab, Test and Design

Complete list of publications, posters, presentations, patents can be found here (associated links are provided)